(1) Field of the Invention
This invention relates to a protected MOS transistor circuit, and more particularly to a MOS transistor integrated circuit which includes a circuit for obviating rupture of the gate oxide of an MOS transistor when power is off.
(2) Description of the Prior Art
It has been known that a relatively high potential applied to the gate of a MOS transistor causes the rupture of the gate oxide. This rupture results in a permanent electrical short between the gate and the substrate on which the MOS transistor is formed, thereby destroying the MOS transistor.
The gate oxide ruptures when the dielectric strength of the gate oxide, made of, for example, silicon dioxide, is more than approximately 10.sup.7 V/cm. Thus, for example, if 80-100 V is applied across a 800-1000 Angstrom thick gate oxide, rupture occurs. (Hereinafter, the voltage at which rupture occurs is referred to as the dielectric breakdown voltage.)
Therefore a protective input circuit, which provides a voltage-limiting function, is usually placed at each of the signal input terminals of a MOS transistor integrated circuit chip (MOS IC chip) connected to a MOS transistor gate.
Various kinds of protective input circuits have been used as shown, for example, at pp. 96-101 in MOS/LSI Design and Application (Dr. William N. Carr and Dr. Jack P. Mize; Edited by Robert E. Sawyer and John R. Miller; McGraw-Hill Book Company), and in U.S. Pat. No. Re. 27,972 to Daniel R. Borror, et al.
These protective input circuits utilize either the breakdown voltage of a zener diode or the high threshold voltage of a thick-oxide MOS transistor to provide protection. The protective voltage (i.e. the breakdown voltage of the zener diode or the high threshold voltage of the thick-oxide MOS transistor) is set to be lower than the dielectric breakdown voltage at which the gate oxide ruptures.
Despite these protective input circuits, ruptures occur during handling (shipping, testing, circuit board assembly, etc.), especially in large scale integrated (LSI) circuits, due to current surges.
This problem has become more significant due to the fact that gate oxide layers have become thinner (e.g., 300-500 Angstrom) as the density of elements in integrated circuits has increased.
That is, the dielectric breakdown voltage has become lower as the gate oxide has become thinner; and as a result, the dielectric breakdown voltage has become approximately equal to or occasionally lower than the protective voltage.
Further, even if the dielectric breakdown voltage is higher than the protective voltage, rupture of the gate oxide often occurs, because the protective zener diode or thick-oxide MOS transistor does not respond promptly when excessive current surges occur at the signal input terminals. Therefore rupture of the gate oxide takes place before the protective zener diode or thick-oxide MOS transistor becomes conductive. The slow response of the protective zener diode or thick-oxide MOS transistor occasionally results in rupture of the zener diode or the thick-oxide MOS transistor itself.
The rupture problem occurs not only with input MOS transistors but also with output MOS transistors. Furthermore, the rupture problem occurs in handling much more when power is off than when power is on. In fact, the rupture problem seldom occurs when power is on. Therefore, a need exists for a protective circuit for an MOS transistor circuit which can protect an MOS transistor from rupture caused by excessive current surges, especially during handling when power is off.